Welcome to EECS 388: Computer Systems and Assembly Language. In this class you will learn how computer systems are constructed and how to program those computer systems using assembly language. Learning will focus on internal microprocessor organization, programming in assembly language, performing input and output, and controlling external devices. The interaction of these four basic computing elements is at the core of effective embedded system design and is important knowledge in general purpose computing as well.
The laboratory for this class makes use of the Xilinxi XUPi development board pictured on the right. This development board is built around the Virtex-II Pro FPGAi. These FPGAsi are high-performance, high-density reconfigurable devices which students will use for system-on-chipi development. Students will use these devices and their associated development environments to develop fully functional embedded system designs which they will program using a combination of assembly language and C.
In addition to the FPGAi, the XUPi development boards contain many integrated peripherals which will be used by the students. Using peripherals such as serial ports, LEDs, push buttons, and switches, students will learn the basic mechanisms of I/O and external device control.
The system designs in this class will all make use of the MicroBlazei microprocessor; a 32-bit soft-processori core developed by Xilinxi for use in their FPGAsi. This processor is a simple but modern 3 or 5 stage pipelined microprocessor which is based on the DLXi architecture described by Patterson and Hennessy in their computer architecture book. The instruction set architecture (ISAi) of the MicroBlazei will be studied in depth and will be used by students in most of the laboratory exercises.
Students in this course should leave the class with knowledge of computer system design and assembly programming. Students should also leave with understanding of the basic relationships between high-level languages, assembly level programming, and hardware level system design.
In addition to the reading materials required in the lecture, the laboratory part of this class will require the use of many of the reference documents provided by Xilinxi for their products. These reference materials give details information on the design of Xilinxi hardware components and will be invaluable to completing the projects in this class. A list of interesting reference materials can be found on the website on the Reference Materials page.
During this course students will be expected to learn basic concepts in computer systems design and assembly level programming. This course is FPGAi based and makes use of the Xilinxi XUPi development board. As such, students will learn to be proficient with the Xilinxi development environment and Xilinxi FPGAsi. By the end of the course students will be expected to design and program simple embedded systems using these tools.
This is not an introductory level course. While the TAs in your class are more than happy to answer your questions, they will not do your projects for you. This means that they will help you to understand the general concepts in the class, they will help you with problems that you encounter with the Xilinxi tools, and they will help you debug and fix specific problems in your project. They will not, however, repeat lectures for students that missed class or answer questions which are general or vague, such as "What is wrong with my code?". As an upper-level course, you are expected to work outside of class on your project and come to class prepared with questions.
Students are also expected to demonstrate their working designs on the due date for the given laboratory. Demonstrations are done in class with your TA and they must be completed by the end of that lab. If you fail to demonstrate your project by the due date you can demonstrate your project the next laboratory period for a 25% penalty. Laboratory projects will receive a grade of 0% if they are more than one week late. There are no exceptions to these rules unless you have received special permission from your TA before the due date.
In addition to the in-class demonstration, students will be expected to turn in a project report for every laboratory. These project reports should follow the guidelines established in the Project Reports documentation. These project reports are worth 25% of your overall project score and will be graded thoroughly. If you fail to turn in a report for your project you will be penalized 50% on your overall project score. Project reports along with all other laboratory submission materials are due Friday on the week that the project is demonstrated to your TA.
Questions about grading and grading disputes will not be answered during the laboratory period. If you have a question about your grade or think that you deserve more points then you should visit your TA during their office hours. If you feel that you deserve more points on your grade then you must demonstrate to your TA exactly why you deserve more points. Vague requests for more points will not be successful. Additionally, the TAs reserve the following rights when reassessing a grade:
For each laboratory project in this class you will be required to demonstrate a working design on the due date in class and turn in your project materials to the TA by Friday on the week that the project was demonstrated. Thus, the deliverables for each laboratory is the following:
Project materials must be submitted to your TA in electronic format, including the project report. Project reports must be submitted as either a Word Document or as a PDF. All project materials must be submitted to your TA in a single zip file. Project submissions which consist of multiple files or submissions which are not in zip format will not be accepted. Additionally, your project submission must follow these guidelines:
Additionally, please clean up your system-on-chipi design before submitting them to your TA as instructed in laboratory 1. In the past failure to perform this step has resulted in projects not be received correctly by the TAs due to limitations of email.
Each laboratory project requires the submission of a report along with the design and source files. Every report should contain all of the information described below. Failure to include any of this information will result in a loss of points.
This section should contain one short paragraph which summarizes the work that your performed for the laboratory and describes the results that you ended with. The abstract should be no more than five to ten sentences but should still be informative.
This section should contain several paragraphs which discuss any background information which is pertinent to the laboratory. Additionally, it should describe what the purpose of the laboratory was and what the expected results of the laboratory are. Diagrams should be used to illustrate the system-on-chipi and software designs. Ensure that all diagrams are correctly labeled.
This section section should contain many paragraphs which describe the system that was designed and implemented. You should detail exactly what was built as part of the laboratory, how it was built, and why it was built. Block diagrams, figures, source code, and screen shots are all highly effective and consise ways of communicating your design and implementation.
This section should contain several paragraphs which describe the results of the laboratory. Describe the functionality of the resulting design and discuss how well your design and implementation solved the original problem. Provide any useful system metrics such as the amount of code or the amount of time which was required to solve the problem. Also be sure to mention any problems which were encountered during your design and implementation.
This section should contain the answers to all of the questions which are part of the laboratory. The length of your answer is dependent on the question being asked, however, generally speaking answers should be between two sentences and two paragraphs. Answers should get to the core of the question without being overly verbose.
This section should contain one or two paragraphs which finish the report. Reiterate the original problem and quickly reason about how and why your design and implementation solve the problem. Provide any insight you might have about possible future work related to the project and provide any interesting extensions to the project that could be explored.
This section should list all of the reference material which was used during your design and implementation. As engineers you are accountable for your actions and reports. Providing references establishes credibility as to the design and provides a path of reasoning for you decisions and ideas. References should be cited in your report using the appropriate reference number as show below:
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The Hthreads operating system established the effectiveness of hardware components in operating system design [1].
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[1] J. Agron, W. Peck, E. Anderson, D. Andrews, E. Komp, R. Sass, F. Baijot, and J. Stevens, “Run-Time Services for Hybrid CPU/FPGAi Systems On Chip,” in Proceedings of the 27th IEEE International Real-Time Systems Symposium (RTSS), December 2006.
[2] MicroBlazei Processor Reference Guide - http://www.xilinx.com/ise/embedded/mb_ref_guide.pdf.
The MicroBlazei reference guide is invaluable for anyone making use of the microprocessor. The reference guide contains a detailed description of the MicroBlazei architecture including information about the register set, pipelining, memory systems, and data types. The guide also contains a comprehensive list of all instructions supports by the MicroBlazei ISAi.
The GPIOi reference guide describes the hardware specifications for the OPB GPIOi peripheral. The Xilinxi GPIOi peripheral is a design time configurable general purpose I/O device which gives software the ability to inspect and control wires within the FPGAi. This is done through a register set which is exposed by the GPIOi peripheral as a memory mapped region on the OPB bus. Software is able to read and write to this register set using standard load and store operations from the processors ISAi.
The Xilinxi interrupt controller reference guide describes the hardware specifications for the OPB INTC peripheral. This peripheral is a design-time configurable programmable interrupt controller. Modern processors are only capable of responding to one or two difference external interrupt sources. The programmable interrupt controller is a hardware peripheral which give more flexibility to system-on-chipi designers by taking an arbitrary number of interrupts sources and condensing them into a single interrupt source, the PIC itself. The PIC then exposes, as registers, the original sources of the interrupts. Thus, software is able to respond to an arbitrary number of interrupt sources by examining the PIC registers.
In laboratory 1 you will design a system-on-chipi using the Xilinxi development suite and targeted at the XUPi development board. Your design will contain a MicroBlazei soft-processori, a serial port, and three GPIOi devices. The processor will be connected to the serial port and GPIOi peripherals in a shared-bus architecture. You will then program this system-on-chipi, using the C programming language, to print out your name five times to the screen of a desktop computer which is connected to the XUPi development board using the serial port.
In this laboratory your system-on-chipi design will consist of three major components:
Before you begin this laboratory we suggest that you become familiar with the Xilinxi development suite. Please read the Introduction to EDK, Base System Builder, and XPS Interface tutorials before you begin.
This may not seem like much, but, at the end of this laboratory you will have created a system-on-chipi and executed a program on top of it in a bare metal environment. This represents a very basic but fully functional embedded system.
The directions for completing this project can be found on the Laboratory 1 Directions page. This page contains step-by-step directions on how to build your system-on-chipi design and software application. Additionally, there is a screencast of the entire project which shows how the project is completed.
It will be to your benefit to either print out the project directions or to have the project directions page open while you are doing this laboratory.
/* <comments with your name and KUID> */
/* <comments with a description of this source file> */
#include <stdio.h>
int main(void)
{
<your code here>
return 0;
}
Before you submit a project to your TA you will need to clean out all of the XPS generated files. You can do this by selecting "Project -> Clean All Generated Files" from the menu. Please do this before submitting all projects.
In laboratory 2 you will design a system-on-chipi which includes one Microblaze soft-processori and several General Purpose I/O peripherals (GPIOs). Just like laboratory 1, the system-on-chipi will be created using the Base System Builder supplied by the Xilinxi tool suite. Once your system-on-chipi has been created, you will write a custom software application to take input from the push button and produce output on the LEDs. In order to complete this laboratory successfully, you will need to understand the workings of the GPIOi peripheral by reading the GPIOi reference manual which can be found in the references section.
This project will be a due during the week of September 8, 2008 through September 12, 2008. Please allocate enough time outside of class to read and understand the project and the workings of the GPIOi.
Before proceeding with this laboratory please read at least the OPB GPIOi Registers and OPB GPIOi Operation sections of the GPIOi reference manual. In future labs is will be your responsibility to implement application software to control an FPGAi peripheral. In this lab you will be expected to understand how the provided software application implements the operational specification provided by the reference manual.
For this laboratory you will be creating a system-on-chipi design, containing the peripherals mentioned above, using the BSB as described in laboratory 1. Once you have the system-on-chipi design created you will need to create a new software application named "lab2" which contains one source code file named "lab2.c". After this, copy and paste the source code template into your source file.
Read the comments in the source code template and try to understand how the source code provided implements the GPIOi hardware protocol described in the GPIOi reference manual. Once you understand what the source code template is doing, modify the main function to implement the project requirements described in the project assignment given above.
Answers to the questions for this laboratory can be found in either the Memory-Mapped I/O Tutorial or the GPIO reference manual.
In laboratory 3 you will design a system-on-chipi which includes one Microblaze soft-processori, several IP cores, and an OPB bus which connects all of the components in the system. Like the previous laboratories, you will be using the Xilinxi BSB wizard to create a basic hardware design for your system. Unlike previous laboratories, however, you will be modifying the basic design by adding a custom peripheral. This custom peripheral, which will be provided for you, performs 128-bit encryption and decryption using the Blowfish algorithm. Using this Blowfish hardware peripheral, you will design and implement a software application which will encrypt and decrypt data. Additionally, your software will be responsible for retrieving data from a host computer using the RS-232 serial port.
The due date for this project will be the week of September 29, 2008 through October 3, 2008. The project reports will be due on Friday, October 3, 2008. Ensure that you demonstrate your project to your TA during your laboratory period and turn in your complete project submission, including the project report, by the Friday due date.
For the first week of this laboratory you should concentrate on getting a basic "read-eval-print" loop working. To accomplish this you will first need to get a basic system-on-chipi design working using the BSB. Refer to laboratory 1 if you do not remember how to use the BSB. At this point, do not worry about adding the custom blowfish encryption core. All you will need is a Microblaze processor and a RS-232 serial port for communicating with the host computer.
Once you have created, downloaded and tested your hardware design you should build a basic skeleton for the software. The software for this laboratory should consist of two basic phases: initialization and a "read-eval-print" loop. In the initialization phase you will read in a 128-bit pass phrase to use for encryption/decryption. In the "read-eval-print" loop you will read in a string, encrypt that string, decrypt the encrypted string, and then print the original, encrypted, and decrypted strings. For the first week, just get the reading and printing working for skeleton application. We will learn how to encrypt and decrypt with the blowfish hardware next week.
There are two special things to note about the software for this laboratory. First, for this laboratory we would like you to use the low-level function inbyte() to read values from the serial port. This function, which has the signature "char inbyte()", will read a single character from the serial port and return it to the caller. You should make wrapper functions for inbyte() as necessary. For instance, it would be wise to write a wrapper function which reads in a 128-bit string one character at a time using the inbyte() function.
The second special thing to note is that the blowfish hardware requires data in 64-bit blocks. The software, however, will be reading input strings to encrypt and decrypt 8-bits at a time. Thus, it will be necessary for you to pad input strings to be a multiple of 64-bits by appending 0's as necessary. For instance, if the user enters "encryptthis" as the content to encrypt then the input string will be 88-bits which is not a multiple of 64-bits. In this case your software will need to append 40-bits of zero to the input string before encrypting and decrypting. You can do this in any way that is convenient for your design.
For this project you do not need to do any sort of dynamic memory management. It is fine for your software to limit the size of the user input to some maximum value. This way you can simply use statically declared arrays for reading input data and storing encrypted and decrypted values. We advise that doing this will substantially reduce the complexity of your software.
For the second week of this project you will be adding a custom Blowfish encryption hardware core to the basic system-on-chipi design that you created during the first week. You will then be modifying the "read-eval-print" loop that you created during the first week to add support for performing encryption. To begin this project you will need to download the Blowfish Encryption Hardware. Once you have this file downloaded, you will need to unzip the file into the "pcores" directory inside of your existing system-on-chipi design. For instance, if your system-on-chipi design is located in the directory "H:\eecs388\lab3" then you will unzip the Blowfish encryption hardware into the directory "H:\eecs388\lab3\pcores" (this directory should already exist).
Once you have done this, the Blowfish hardware will be available for addition to your design. First, open up your existing system-on-chipi design. Once the design is open, click on the "IP Catalog" button in the upper left quadrant of the XPS window; also ensure that the "System Assembly View" tab is selected near the middle of the window. In the "IP Catalog" panel you should see a entry named "Project Local Pcores". Click on the plus sign next to this entry and then double click on "OPB_BLOWFISH" to add the Blowfish hardware to your design. You now need to attach the Blowfish hardware to the sytem bus. Do this by looking in the main window for the "opb_blowfish_0" entry. If you do not see this entry then ensure that "Bus Interface" is the selected filter near the top middle of the window. Click on the plus sign next to the "opb_blowfish_0" entry. You should see a green line extending out to the left from the entry and connecting to another line which goes up to the label "OPB". The empty bubble at the intersection of the two lines indicates that the "opb_blowfish_0" core is not yet connected to the OPB bus. Clicking on the bubble will connect it to the bus and fill in the bubble to indicate that the core is now connected to the bus.
Once the Blowfish hardware is connected to the bus, you will need to assign an address space to it. Click on the "Addresses" filter in the top middle of the screen to view the current system memory-map. Locate the entry for "opb_blowfish_0" and give it a "base address", typically "0x42000000" will be an available address. Once the base address had been selected you can click on the "Size" drop down menu and select the size of the address space, typically 64K is a good value. Doing this will automatically setup the "high address" for you. Note: Instead of doing this manually each time you can also simply click on the "Generate Addresses" button near the top middle of the screen. This will let the tools automatically create a memory-map for you.
At this point your system-on-chipi design for this lab should be complete. The only remaining step is to control the Blowfish encryption hardware from your software design in order to encrypt and decrypt data with it. In this laboratory you will need to write your own software from scratch to do this.
The register set for the Blowfish hardware is show in the picture to the right. There are nine 32-bit memory-mapped registers which are organized into four logical registers. The following describes the registers:
The Blowfish encryption core supports three operations: initializing the key, encrypting data, and decrypting data. All of these operations are controlled by the software through the control register in the hardware. The software steps required to interact with the Blowfish hardware are described below:
To complete this project sucessfully you will need to read in a 128-bit key from the serial port and then initialize the Blowfish hardware using the key. Once the hardware has been initialized, you will then encrypt and decrypt additional data read in from the serial port using the Blowfish hardware. Data input, encryption and decryption should be performed infinitely while your application is running. Additionally, your application should output the original input data, the encrypted data, and the decrypted data every time new input is read and encrypted / decrypted. To get full points on this project the original input data and decrypted data must be the same.
In laboratory 4 you will be using your system-on-chipi design from laboratory 3. In laboratory 3 you were required to write a C program which encrypted 64-bit data blocks using the OPB BlowFish hardware which was provided to you. In this laboratory you will be rewriting your C program in Microblaze assembly. Like in laboratory 3, at the end of this laboratory you should have a system-on-chipi design which is capable of encrypting and decrypting 64-bit data blocks with a 128-bit encryption key. The encryption and decryption itself is performed by the hardware.
The basic project directions for this laboratory are the same as for laboratory 3. For the hardware part of the lab you can simply reuse your existing design from laboratory 3. You can also use the laboratory 3 solution provided by your TA. For this laboratory you will need to create another software application using the Xilinxi tools and then implement that software application in MicroBlazei assembly. The MicroBlaze Assembly Tutorials provide a lot of useful and practical information and reading them will be invaluable towards completing this project. Additionally, the MicroBlaze Reference provides detailed information about all of the instructions supported by the MicroBlazei processor.
The steps required to complete this project are as follows:
In laboratory 5 you will be creating a simple, interrupt-based system-on-chipi design. You will be instantiating three GPIOi devices in your system-on-chipi design and will write software which will respond to interrupts generated by those GPIOi devices. The software that you write for this laboratory will be a mixture of high-level C code and low-level assembly. Additionally, you will make use of some Xilinxi provided low-level interrupt routines. Reading and understanding the interrupt handling tutorial will help you complete this project.
This purpose of this project is two fold. First, students should learn how to use functions written in assembly in C programs and how to use functions written in C in assembly programs. Second, students should learn how hardware interrupts are handled at the processor level, the assembly level, and the C level. Additionally, the software developed in this laboratory project should demonstrate how a running program can be interrupted by the processor so that another function can be executed. Because interrupts represent asynchronous, non-standard control flow in software programs the description of this project is complex, however, the developed software should be relatively simple.
The software for this project should consist of at least six functions. You are required to have these six functions in your demonstrated project. First, you should have a main function which enables interrupts in the system and then calls the main_loop function. The main_loop function should infinitely loop. Each loop should prompt the user for two numbers using the serial port, add the two numbers together, and then print out all of the prime numbers less than the result. This represents the main processing of the application.
You will also have four functions which perform auxiliary processing when interrupts occur. The first function should be intr_handler. This function, which should be written in assembly, will need to query the programmable interrupt controller to determine what interrupt occurs. If the interrupt was from the DIPSW GPIOi then the function handle_dipsw should be called and if the interrupt was from the push button GPIOi then the function handle_pb should be called. These two functions should be written in C and should perform the processing described below. The last function you will write is the write_leds functions, which should be written in assembly. This function will be used by the handle_dipsw and handle_pb functions and it used to illuminate certain LEDs.
The second function that you will write in assembly will be a function called write_leds. This function should be a function of two parameters. The first parameter should be the base address of the LEDi GPIOi and the second parameter should be an unsigned integer value which indicates which light on the LEDi to illuminate. This function must be called by your handle_dipsw and handle_pb C functions.
Laboratory 6 will be the final project in the EECS 388 laboratory. Students have the option to choose their own project for this laboratory. If you elect to take this option then please tell your project idea to the laboratory TA before you begin. This will allow the TA to determine if your project is of the appropriate difficulty. If you do not wish to come up with your own idea then you can do the project described below.
For the Simple Simon game you will develop a system-on-chipi using the Xilinxi XUPi FPGAi that we have been using all semester. You will need to include a RS-232 serial port, the LEDs, and the push buttons in your hardware design. You will then create a software application which blinks the LEDs in a random pattern.The user will then attempt to repeat the pattern using the push buttons. If the user correctly enters the random sequence then they will be awarded a point, otherwise a point will be deducted.
The student will have a greater amount of leeway in determining how to implement this project. There are, however, a few requirements that your implmentation must meet:
In addition to these requirements your software application must present a reasonable user interface using the RS-232 serial port. The user should be able to determine what their score is at any given time, and the correct solution to the random sequence should be shown to the user once one of the rounds of play has finished. Additionally, the user interface should indicate button presses as the user presses them.